Engineering Plan

engineering Plan Engineering Plan SC312 Final cow dung 11/7/04 * name* We plan to see the prefatory multi-cycle processor design as shown in the textbook, as nearly as pipelining and jump and tie in. The toughest part of this design allow foring be the datapath control, for which we volition be using a FSM. The ALU get out implement add, sub, and, or, sll, and slt functions though a separate block is typically used for shift operations, we matte that putting sll and srl in the ALU would substitute our design. All other grassroots functions (lw, sw, lui, beq, bne, j) will be employ as show in the textbook.

The processor will exact two main stages: extend instructions into store and implement instructions. Special instruction codes will be defined as stall and stop death penalty to work in articulation with the FSM. The global reset will set all warehousing and registers to 0, and put the FSM in bill instructions mode. We would similar to use one depot module to store both instruct...If you want to get a full essay, order it on our website: Orderessay

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